TechOnline India Header
Most Popular
Top 5 Courses
  • Fundamentals of PCB Design
  • Paralleling DC-DC Converters
  • Fundamentals of x86 Architecture
  • Analog Devices' SHARC 32-Bit DSP
  • Analog eLab - Improved INA Input Filter
    Most Popular
    Top 5 Technical Papers
  • ARM Platform Technical Overview
  • Using C++ Efficiently in Embedded Applications
  • Top 10 Drivers for Embedded Android
    Most Popular
    Top 5 Webinars
  • Designing embedded HMIs and connecting them to hardware
  • 2009 Embedded Market Study
    All Articles Products Courses Papers VirtuaLabs Webinars
    Top Search Items
    C


    Techpaper Spotlight

    Wind River
    Accelerating the Development of Embedded Linux Devices with JTAG On-Chip Debugging
    /
        Login | Register | Welcome, Guest

    Topics
    POLL
    How much code have you produced in your career?
    A few KLOC
        38%
    100s of KLOC
        44%
    Millions of LOC
        11%
    A trillion
        7%
     



    Isolate your interface to communicate safely and better (Part 2 of 2)
    Understand how galvanic isolation of signal and power can improve performance and safety of basic interfaces such as RS-485
    Planet Analog
    RS-485 (formally known as TIA/EIA-485) networks provide the backbone for communications in applications ranging from industrial control systems to roadside traffic message boards. In environments where high voltages are present, electrical isolation from the communication bus to logic controllers is regularly employed for human safety and equipment protection.

    Often overlooked are the benefits of isolation affecting system performance rather than simply protecting it from dangerous voltages. These benefits come in the form of uninterrupted, error-free communication in the presence of harsh ground perturbations and other system level noise that would otherwise render a non-isolated system inoperative.

    This article discusses the performance benefits of using isolation in RS-485 networks, identifies characteristics of networks that could benefit from using isolation, and explains the trade-offs of various wiring configurations to maximize performance in an isolated system. It is presented in two parts, as pdf files (no registration required):

    • Part 1: Ground and common mode voltage disturbances; transmitted but not received signals, click here.
    • Part 2: Isolated communication works; additional wiring improvements; networks that need isolation; maximizing the benefits of isolation, click here.
    About the authors
    Jeff Marvin is the Burlington (MA) Design Center Manager for Linear Technology Corp. He joined Linear in 2006 to lead the design center. Jeff previously spent thirteen years at Motorola and Freescale Semiconductor in analog design and management. Jeff holds an MSEE from Arizona State University and a BSEECC from Rochester Institute of Technology.

    Brian Jadus is a Senior Design Engineer with Linear Technology's Mixed Signal Products Group, working on interface products at Linear Technology Corporation. Brian holds BS and MS degrees in Electrical Engineering from the Rochester Institute of Technology.

    1
     
     
    Latest Webinars
    · The Next Generation of Ethernet: How the New IEEE Standards Enable Energy Efficiency and Quality-of-Service
    · Simplified Physical Layer Receiver Test of Re-timed Architectures Such as USB 3.0, SATA, SAS, PCIe 2
    · How to solve the most common high-speed bus issues in embedded design on a budget
    · Early access to ARM Core Technology with Fast Models from ARM
    · Latest MIPI Standards: PHY and Protocol Testing Guidance
     
    Member Company Spotlight
    ARM
     

    In this on-demand webinar, you will learn about the ARM PrimeCell infrastructure and how the DesignWare Verification IP enables the development of a more thorough and reusable verification environment. View "Rapid Verification of ARM11 processor-based platforms" here.


    Member Companies