SAN JOSE, Calif. – A startup that is developing a microprocessor geared for calculating statistical probabilities has come out of stealth mode to introduce a product using its technology. Lyric Semiconductor is licensing a technique to develop an error correction device for NAND flash it claims provides superior performance to today's approaches while using a faction of their power.
Lyric (Cambridge. Mass.) got its start in about 2006 when the Defense Advanced Research Projects Agency awarded the company $18 million to develop ideas in the MIT doctoral dissertation of its chief executive and co-founder, Ben Vigoda. His idea was to build a programmable processor dedicated to using handle Bayesian Logic.
The company is now working to develop such a microprocessor, the GP5 not due until 2013. The job involves crafting novel kinds of gates, circuits, a new chip architecture and a new programming language.
Rather than use binary logic, the GP5 will use multiple levels of signaling to represent different probabilities, data structures expressed in a new language as chains, trees or grids. Such a chip could be ideal for a growing number of applications including search, fraud detection, spam filtering, financial modeling and genome sequence analysis, said Dave Reynolds, a co-founder and vice president of product development at Lyric.
"A lot of people are realizing probability-based apps will be more popular going forward,: Reynolds said.
"Many people are trying to develop probability languages such as Microsoft's Infer.net or R, used by Google and others," added Reynolds. Such languages "don’t say how solve a problem, they just set constraints and let a system find a solution," he said.
Lyric claims the GP5 could deliver a thousand-fold performance advantage on select applications over today's digital chips. But the processor design is still at a conceptual stage.
"We will build complete packaged solutions around our technology, at least at first," said Mira Wilczek, director of business development at Lyric.
"We are well aware that the ground is littered with the corpses of processor startups that expected their customers to program in an unfamiliar way, and we will not ask our customers to do that," Wilczek said. "We plan to deliver packaged solutions for one or two killer market segments where we can create the most value with our performance advantages and sell the whole readymade package to our customers," she said.
In the meantime, Lyric is licensing a version of its technology geared for a single function device—an error correction code block for NAND flash memory. The company claims its approach can deliver superior performance over today's ECC blocks while offering a 30-fold reduction in die size and a 12-fold reduction in power consumption.
Lyric believes the approach will be particularly useful on NAND flash controllers for solid state drives used in servers and other systems hungry for lots of storage. "We see our technology as immediately applicable because memory vendors are packing two to four bits on a multi-level cell flash capacitor and the error rates are going way up," said Reynolds.
The company will describe its technology in presentations this week at the Flash Memory Summit in San Jose, Calif.
Lyric will work with licensees to customize is soft IP, delivering GDS code that would effectively look like hard IP blocks. The company is willing to structure the licenses flexibly depending on how much of the technology a flash maker wants and how they want to pay for it, he said.
Lyric is not seeking additional financing. It has already taken in about $2 million in venture money from investors including Stata Venture Partners, the venture arm of Analog Devices Inc. chairman Ray Strata who also chairs Lyric's board.