Introduction: The proliferation of multicore processors and the desire to consolidate applications and functionality will push the embedded industry into embracing virtualization in much the same way it has been embraced in the server and compute-centric markets. However, there are many paths to virtualization for embedded systems. After a tour of those options and their pros and cons, Freescale Semiconductor’s Syed Shah shows why the bare metal hypervisor-based approach, coupled with hardware virtualization assists in the core, the memory subsystem and the I/O, offers the best performance.
Virtualization already has impacted the server and IT industries in a significant way. IT organizations are using it to reduce power consumption and building space, provide high availability for critical applications and streamline application deployment and migration. The trends to adopt virtualization in the server space also are being driven by the desire to support multiple OSes and consolidation of services on a single server by defining multiple virtual machines (VM). Each VM operates as a standalone device. Since multiple VMs can run on a single server provided the server has enough processing capacity, IT gains the advantage of reduced server inventory and better server utilization.
Although not mainstream, similar trends are trickling down into the embedded space as well. The concept of having a sea of processors and the associated processing capacity sliced and diced between applications and processes is not science fiction anymore. The challenge of extracting higher utilization on the processors and consolidation triggered by cost reduction are driving the adoption of virtualization in the embedded systems.
Case in-point is the merging of the control- and data-plane processing on to the same system-on-chip (SoC). Previous approaches used separate discrete devices for these functions. With multicore SoCs, given enough processing capacity and virtualization, control-plane applications and data-plane applications can be run without one impacting the other. Data-plane and control-plane applications, in most cases, will be mapped to different cores in the multicore SoC as shown in Figure 1.
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