TechOnline India Header
All Articles Products Courses Papers VirtuaLabs Webinars
Top Search Items
C


Techpaper Spotlight

Wind River
Accelerating the Development of Embedded Linux Devices with JTAG On-Chip Debugging
    Login | Register | Welcome, Guest

Topics
 



Booting an RTOS on symmetric multiprocessors
It is a significant challenge to provide a framework to deploy inherently parallel applications like digital signal processing functions on RISC processors to reduce the bill of materials. To this end, the embedded operating system is an essential piece of the overall solution, which in a perfect world, should be able to dispatch individual application tasks on multiple cores.
Although the use of multiple processors in desktop computation has become commonplace, such a configuration is still finding its place in deeply embedded devices in such markets as consumer electronics, aviation, and automotive. An embedded system has unique characteristics and often requires real-time behavior to complete at least a portion of its job.

Significant research is underway in the industry and in academia to design tools that can help today's designers of embedded systems software (operating system and applications) benefit from the newly found computational power waiting to be tapped in the form of multiple cores. It is a significant challenge to provide a framework to deploy inherently parallel applications like digital signal processing functions on RISC processors to reduce the bill of materials. To this end, the embedded operating system is an essential piece of the overall solution, which in a perfect world, should be able to dispatch individual application tasks on multiple cores.

Transitioning from a single-core kernel to a multicore version is not a straightforward proposition as it involves introducing new features like protection primitives, inter-process communication (IPC) provisions, as well as enhancing old components like a task scheduler. This article focuses on one important feature--the startup sequence of traditional single-core kernel--which needs to be updated right now if multicore architectures are to be supported. This article discusses the process once an embedded system boots up; some of the problems/challenges of designing a startup sequence on symmetric multiprocessing (SMP) systems; and finally, a scalable and portable booting sequence is presented for embedded SMP systems.

To read the full article, click here.

1
 
Latest Webinars
· The Next Generation of Ethernet: How the New IEEE Standards Enable Energy Efficiency and Quality-of-Service
· Simplified Physical Layer Receiver Test of Re-timed Architectures Such as USB 3.0, SATA, SAS, PCIe 2
· How to solve the most common high-speed bus issues in embedded design on a budget
· Early access to ARM Core Technology with Fast Models from ARM
· Latest MIPI Standards: PHY and Protocol Testing Guidance
 
Member Company Spotlight
Xilinx
 

Start Your Spartan-3A FPGA DSP Design Now! Evaluate Free Downloadable Tools Built Just for You.


Member Companies