There is increased activity around the ‘internet of things’; the ability to create networks of small devices that monitor and control our surroundings to create a sort of ‘augmented reality’.
A recent development is NXP’s intention to open-source its JenNET IP protocol stack, which uses the IEEE 802.15.4 MAC and PHY as its underlying platform and employs the IPv6 protocol to extend the network’s addressable nodes to what is often termed as ‘effectively limitless’. It is this potential to give any electronic device its own IP-addressable profile that will lead to the ‘internet of things’ concept becoming reality.
However, in addition to uniquely identifying these ‘things’, it follows that the ‘things’ should do something useful and, increasingly, the application that is most often cited is monitoring and control. Consequently, data gathering using some form of ‘smart’ sensor is expected to constitute a large part of activity for the ‘internet of things’.
A market report by analyst IDC and cited by Intel states that by 2015 there could be 15 billion devices with an embedded internet connection, more than two for every single person on the planet today. In reality, as smart sensor applications flourish, the number of connections could grow beyond this figure rapidly, and that will be enabled in large part by the falling cost of developing and deploying connected devices. A major element of that cost will be the embedded intelligence and it is here that many IDMs are focusing their attention, in developing low power, low cost MCUs that meet the commercial and technical requirements
of this emerging application space.
Mixed signal MCUs which also integrate wireless connectivity are already available, they will likely become more prolific in the future. However, for many applications, integrating the wireless connectivity may be less appealing than a two-chip solution, at least while the battle over which wireless protocol will prevail still rages. For this reason, perhaps, there is more activity around developing ultra-low power MCUs that focus on interfacing to ever smarter sensors.
Marking its entry into the MCU market, ON Semiconductor recently introduced its first mixed-signal MCU which focuses on applications that demand precision, as well as low power. ON Semiconductor recently acquired Sanyo Semiconductor and, with it, a portfolio of 8 and 16-bit MCUs. However, for its first in-house development, ON Semi chose the ARM Cortex-M3 32-bit core, which it has married with some mixed signal elements to create the Q32M210. It claims the device has been developed to target portable sensing applications that require high accuracy, predictable operation and the ever-present power efficiency.
ON Semi is more accustomed to developing custom ASICs rather than its own products, however through a number of other acquisitions it believes it has accrued the expertise necessary to address the needs of ‘niche’ applications, where precision is valued. It is the company’s experience in developing niche mixed signal products that forms its credentials, not least in the development of hearing aids that use highly accurate ADCs and a bespoke DSP technology.
The analogue front-end (AFE) used in the Q32M210 features dual 16bit ADCs and configurable op-amps, which result in a true ENOB of 16bits across the power supply range. This is enabled, in part, by an uncommitted charge pump that can be used to extend the operational lifetime of the battery supply. ON Semi claims the charge pump can be used to deliver a consistent 3.6V to the AFE, even when the battery supply has dropped to 1.8V. This could significantly extend the usable lifetime of any device empowered by the Q32M210.
The additional peripherals provide a USB interface, as well as LED/LCD drivers and push-button interfaces. Coupled with the programmable sensor interface, this positions the device as a system-on-chip solution for a range of applications and specifically portable medical devices, where its accuracy will be valued.
The AFE used in the Q32M210 is clearly intended to differentiate it from the competition, in terms of both accuracy and power consumption. However ON Semi isn’t the only device manufacturer to acknowledge the importance of mixed signal performance.
The LESENSE interface
Energy Micro, which also uses the Cortex-M3 core in its ultra-low power mixed signal MCUs, has recently introduced an architectural feature that is set to appear on a number of devices in its family and is currently available on the Tiny Gecko EFM32 range. The LESENSE interface is one of the Gecko’s autonomous peripherals, meaning it is able to continue operating while the ARM core is in a deep sleep mode, thereby saving energy.
Up to 16 sensors can be monitored and stimulated using just the LESENSE
interface, which also features a configurable state machine with up to 16 states, acting as a decoder that can store the results in a buffer, ready for the core to retrieve at a predetermined interval. This avoids waking the core to perform regular ‘house-keeping’ sensor measurements.
Each of the 16 channels has its own set of configuration registers. The scan sequencer runs from a pre-scaled version of the system clock and each channel cycles through three phases; idle, excite and measure, the length of the latter two are configurable through the channel’s timing register. Excitation of the sensor, if necessary, can be through either driving the corresponding pin high, low or connecting it to the output of a DAC channel. Sensor evaluation can be either an analogue comparator or a counter output, with the output being used to trigger an
One application example shows the interface being used to driver four capacitive touch-buttons, which are scanned at 100Hz (100 times per second), triggering an interrupt if one of the buttons is pressed. This clearly targets a different application area from ON Semi’s precision mixed signal MCU, however it highlights the need for relatively simple sensor monitoring in applications such as user interfaces, and more complex applications where specialist sensors are used, such as equipment used to monitor a combustible environment, a smoke detector or temperature monitoring.
A further aspect to the proliferation of sensors is the increased acquisition of data; data which may need to be stored and updated frequently. In these applications the use of flash as a data storage medium may be challenging, at least that’s what Texas Instruments believes. While flash has many benefits, it also comes with relatively high power demands in comparison to non-volatile memory.
However, clearly non-volatile memory also faces the issue of data loss when power is removed and in a bid to address this problem, TI has developed an all- FRAM version of its low power 16bit MCU, the MSP430. FRAM, or ferro-electric RAM, has been in development for some time and there are a number of standalone FRAM memory devices available, however this is the first time it has been used in an MCU targeting ultra-low power applications.
Specifically, FRAM is suitable for smart sensor applications because it offers a much faster write time than flash, with much higher read/write endurance. For the MSP430, the difference is significant; the new device can achieve 1400kbyte/s write times with the FRAM device compared with just 13kbyte/s for flash. This translates to much less time - and therefore energy - used to store data. And while the read/write endurance for flash is around 10k cycles, it is ‘virtually limitless’
So the question is, why hasn’t FRAM displaced flash in this and other application areas? The reasons are, perhaps predictably, more commercial than technical. Even though it has fewer additional manufacturing processes than flash (two for FRAM as opposed to five or more for flash), manufacturing FRAM only makes economic sense at 130nm and even then only up to a density of around 512kbyte. Beyond that, it still costs less to use flash, which is why this first FRAM family has been squarely aimed at the smart sensor application space, where the need for
density is still modest.
Interestingly, while FRAM is being promoted as a unified memory solution, capable of replacing flash, SRAM and DRAM, the MSP430FR57xx range will still integrate an amount of SRAM and the reasons given are twofold; existing applications that use SRAM will be easier to port to FRAM devices that retain the same memory architecture, and secondly TI admits that using SRAM can overcome the timing limitations of FRAM when executing directly from memory. That said, the FRAM’s performance can maintain a clock speed of 8MHz without wait states, which rises to 24MHz when the SRAM cache is used. However, FRAM scales with the technology node, so TI firmly expects this speed to increase in future.
A further concession is the inclusion of on-chip ECC which isn’t supposed to be necessary for FRAM, but is included here to provide a ‘safety net’ for customers. While the MSP430FR57xx doesn’t feature the same level of mixed signal capability in terms of a dedicated sensor interface as the other devices covered here, it does offer up to 12 ADC channels and is clearly going after the same applications. In future there will be even more mixed signal MCUs aimed at this expanding application area, providing further opportunity for developers targeting
the ‘internet of things’.
This article appeared in the June 2011 issue of Electronic Engineering Times Europe.