TechOnline India Header
All Articles Products Courses Papers VirtuaLabs Webinars
Top Search Items
C


Techpaper Spotlight

Lattice Semiconductor
An FPGA "companion" in smart phone design
    Login | Register | Welcome, Guest

Topics
 



Startup offers embedded memory IP
It has started offering embedded memory intellectual property for SoCs being designed for the networking and multicore processor markets.

Memoir Systems Inc. is a 2009 startup company that has begun offering embedded memory intellectual property aimed at SoCs being designed for the networking and multicore processor markets.

The company claims that its "algorithmic" systems approach to embedded memory provision can result in an order of magnitude increase in embedded memory performance. It also states that it is independent of memory type and process technology (see also Embedded memory startup preps 'algorithmic' speed-up).

Memoir Systems (Santa Clara, California) was co-founded in March 2009 by Sundar Iyer (CTO) and Da Chuang (COO), and is backed by Lightspeed Venture Partners.

Iyer has previous experience as co-founder and CTO of Nemo Systems, a network memory company that was acquired by Cisco Systems, and Chuang was a technical leader at Cisco. In conjunction with the formal launch of the company, memory industry veteran, Adam Kablanian, has been named as CEO of Memoir Systems.

"Memoir's synthesis platform can automatically select suitable memory macros from a memory IP library, and incorporate our memory algorithms to synthesize a new memory that is custom-made for the targeted application," said Da Chuang, COO, in a statement.

In examples like packet inspection for networking and high-performance multiprocessor SOCs the number of memory accesses and the impact of memory sizes and locations can be important. Memoir seeks to provide memory usage analysis so that memory optimization and customization can be done. In particular the provision of multiple read- and write-ports to optimally sized memories can have a large impact on SoC and system performance, the company said.

1
 
Latest Webinars
· The Next Generation of Ethernet: How the New IEEE Standards Enable Energy Efficiency and Quality-of-Service
· Simplified Physical Layer Receiver Test of Re-timed Architectures Such as USB 3.0, SATA, SAS, PCIe 2
· How to solve the most common high-speed bus issues in embedded design on a budget
· Early access to ARM Core Technology with Fast Models from ARM
· Latest MIPI Standards: PHY and Protocol Testing Guidance
 
Member Company Spotlight
Xilinx
 

Start Your Spartan-3A FPGA DSP Design Now! Evaluate Free Downloadable Tools Built Just for You.


Member Companies