TechOnline India Header
All Articles Products Courses Papers VirtuaLabs Webinars
Top Search Items
C


Techpaper Spotlight

Wind River
Accelerating the Development of Embedded Linux Devices with JTAG On-Chip Debugging
    Login | Register | Welcome, Guest

Topics
 



New PLL synthesizers from Analog Devices
They ease design in a variety of applications including communications infrastructure base-stations, pulse and Doppler radar applications, test and instrumentation equipment, microwave point-to-point systems, professional mobile radio, very small aperture terminals and aerospace systems.

Analog Devices has announced two new PLL synthesizer that allows flexibility and phase noise performance. The ADF4151 and ADF4196 PLL synthesizers ease design in applications including communications infrastructure base-stations, pulse and Doppler radar applications, test and instrumentation equipment, microwave point-to-point systems, PMR (professional mobile radio), VSATs (very small aperture terminals) and aerospace systems.

With an RF bandwidth of 3.5 GHz, the ADF4151 allows implementation of a Fractional-N or Integer-N PLL synthesizer. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider and is pin-and software-compatible with ADI’s widely-used ADF4350 4.4 GHz PLL. When these two PLLs are used together, the ADF4151 facilitates the use of an external voltage controlled oscillator (VCO) and greatly improves phase noise without significant board revisions.
 
ADF4151 Fractional-N/Integer-N PLL Synthesizer key features:

• 3 to 3.6 V power supply
• 1.8 V logic compatibility
• Separate charge pump supply allows extended tuning voltage (up to 5 V) in 3 V systems
• Programmable dual-modulus prescaler of 4/5 or 8/9
• Programmable RF output phase
• 3-wire serial interface

The ADF4196 is an ultra-fast settling 6 GHz fractional-N PLL that has been specifically designed to meet the GSM/EDGE lock time requirements for communications infrastructure and pulse Doppler radar applications. When used in conjunction with an external loop filter and VCO, the ADF4196 PLL can achieve lock times of less than 5 µs. It consists of a low noise, digital phase frequency detector (PFD) and a precision differential charge pump.
 
ADF4196 Fractional-N PLL Synthesizer key features:

• Frequency hop across GSM band in 5 µs with phase settled within 20 µs
• 1◦ rms phase error at 4 GHz RF output
• Digitally programmable output phase
• 3-wire serial interface
• On-chip, low noise differential amplifier
• Phase noise figure of merit: 216 dBc/Hz

The ADF4151 and ADF4196 PLLs are supported by a new version of ADIsimPLL, a comprehensive PLL synthesizer design and simulation tool. Also announced today, ADIsimPLL Version 3.41 adds support for ADI’s latest PLLs and includes several functionality enhancements.

 

The free development tool can be downloaded at www.analog.com/adisimpll

Download ADF4151 data sheet, order samples or evaluation boards: http://www.analog.com/adf4151

Download ADF4196 data sheet, order samples or evaluation boards: http://www.analog.com/adf4196

Download new version of ADIsimPLL: http://www.analog.com/adisimpll

View ADI’s complete portfolio of market-leading PLL synthesizers: http://www.analog.com/pll

1
 
Latest Webinars
· The Next Generation of Ethernet: How the New IEEE Standards Enable Energy Efficiency and Quality-of-Service
· Simplified Physical Layer Receiver Test of Re-timed Architectures Such as USB 3.0, SATA, SAS, PCIe 2
· How to solve the most common high-speed bus issues in embedded design on a budget
· Early access to ARM Core Technology with Fast Models from ARM
· Latest MIPI Standards: PHY and Protocol Testing Guidance
 
Member Company Spotlight
Xilinx
 

Start Your Spartan-3A FPGA DSP Design Now! Evaluate Free Downloadable Tools Built Just for You.


Member Companies