A recent iSuppli EU report has revealed that Automotive OEMs are expected to spend over $33 billion on Infotainment electronics by 2013 and semiconductor companies are looking for means to tap this fast-growing opportunity.

Adapting an existing consumer grade application processor for the automotive sector by reusing at least 75% percent of the design is a quick and sure shot way to capture a slice of this adjacent high-growth market. This calls for not just media functionality but also the need for bringing automotive cockpit functionality into existing processing platforms.

However, while adapting a consumer grade solution for automotive purposes, one will face system level architectural, design and implementation and qualification challenges arising out of dissimilar safety considerations for an automotive grade processor vis-à-vis a consumer grade processor. 

Semiconductor companies with the ability to scale internal automotive expertise or collaborate quickly with right partners will be able to capitalize on the opportunity and address associated challenges cost effectively and efficiently. The subsequent sections will focus from chip design perspective.

Redesigning Chip for automotive Automotive Safety standards like SIL (Safety Integrity Level) at level 3[1] or 4[2], translate into specific SoC architectural requirements and have ramifications at the logic design, library selection, synthesis, layout, and qualification level as well.

 

Overcoming architectural challenges

From an architectural standpoint, the key challenges include fail-safe implementations with redundant cores, redundant logic implementation for critical functions, as well as implementing various encryption and authentication schemes. Also important are online self-test mechanisms for safety critical hardware, enhanced debug and patch units implementations to allow on the fly debug.

Error protection must be implemented in all memory, internal or external. For error recovery, the architecture must also implement extensive and predictable interrupt handling capability.

DMA-based CRC checks are mandatory across the peripherals as well as multi-bit implementation for key configuration registers for additional safety.

Overcoming design challenges

On the design side, the adaptation of a typical media/application processor to an automotive infotainment/cockpit application will warrant the addition of numerous automotive-specific interfaces. This brings in integration and interoperability challenges.

To take care of such interoperability concerns, there are standard media/control interfaces that have been adopted by the various automotive consortia.

The relevant interfaces include automotive gateway connectivity interfaces like CAN/LIN/FlexRay/I2C/SPI; Media Transport interfaces like MOST/Ethernet/IDB-1394; Wireless connectivity interfaces like WLAN, Bluetooth & wire line connectivity interfaces like USB,  Audio Jack, iPod/iPhone dock; and test/debug interfaces enabling on-the-fly debugging. Developers/designers of automotive components are expected to ensure smooth interoperability of components from different original equipment manufacturer (OEMs)/Vendors.

Apart from safety requirements, automotive applications demand higher reliability and thus better MTBF (mean time before failure) from the various silicon components. This leads to choice of stringent DFT (design for testability) metric norms like close to 0 defective parts per million (DPPM) targets, stuck-at coverage of 99.9% and transition fault coverage of 90% or above.

This is a stark contrast from consumer grade devices that need a stuck-at coverage of 90% and transition fault coverage of 80%. Transition fault coverage of 90% and above can be achieved by following launch-on-last-shift method of transition delay. For IDDQ (quiescent current), 8-12 measurements are taken in order to achieve high coverage.  Process metrics like burn-in and reliability must also be measured, evaluated and qualified before such devices can be put into full-scale production and product deployment. 

Overcoming implementation challenges

To meet the stringent reliability expectations, different implementation techniques must be simultaneously adopted to enable the best level of fail-safeness. For example, there are guidelines for placement, routing and clock layout to be enforced during backend implementation.

Placement using physical isolation and techniques to avoid symmetry can reduce common nodes. Routing clocks to the redundant blocks through separate paths, non-overlapping implementation of compare logic both at the physical and logical design end, and custom implementation of standard cells with appropriate usage in critical functions, are some measures that can contribute to achieving mission-critical redundancy.

At the package level substrate design, care must also be taken to avoid an overlap of redundant signals. Design for Manufacturability (DFM) techniques like via redundancy an wire spreading may also need to be employed.

Implementation of reliability and safety requirements for automotive architecture and design is no easy task. AEC Q-100[3] is the minimum qualification that needs to be met for multiple parameters like
temperature cycle, power temperature cycling, temperature humidity bias, electro-thermally induced gate leakage, high temperature storage, package assembly integrity etc. Real time monitoring of quality and test management can minimize the failure rate at the implementation level.

Crossing the Chasm

Adapting a consumer grade solution to arrive at the automotive infotainment/cockpit solution of tomorrow will enable semiconductor

vendors/manufacturers enter adjacent markets with a reasonably lesser budget than it would take for them to enter a new product segment.

However, overcoming the above mentioned challenges calls for a blend of chip architecture, design and implementation expertise in the consumer electronics/multimedia space, and automotive electronics/media space. This poses an organizational challenge for semiconductor companies: finding required competencies while ensuring an adequate time to market advantage.

Semiconductor companies who can scale either internally or by collaboration with a partner having consumer and automotive electronics expertise will get a head start in this race! The pie will start to shrink as firms make their first moves and get OEMs signed up. A semiconductor company who can crack the scale and time-to-market puzzle will get the lion’s share!

 

References:

[1] SIL-3 : Failure rate of 1 in 10-100 Million

[2] SIL-4 : Failure rate of 1 in 100-1000 Million

[3] AECQ100 is an standard specification developed by Automotive Electronics Council, setup by major automotive manufacturers and
suppliers, and outlines the recommended new product and major change
qualification requirements and procedures. It details a set of stress tests,
defines the minimum stress test driven qualification requirements, and
references test conditions for the qualification of integrated circuits.

 

About the authors:

 

 Udaya Kamath & Job K. Joseph (below), are Silicon Practice Specialists, Semiconductors and Systems, Wipro Technologies.

 

 

This article was first published in EDN Asia-India, February 2012