TechOnline India Header
Most Popular
Top 5 Courses
  • Fundamentals of PCB Design
  • Paralleling DC-DC Converters
  • Analog Devices' SHARC 32-Bit DSP
  • Fundamentals of Audio Networking
  • Fundamentals of x86 Architecture
    Most Popular
    Top 5 Technical Papers
  • ARM Platform Technical Overview
  • Using C++ Efficiently in Embedded Applications
  • Top 10 Drivers for Embedded Android
    Most Popular
    Top 5 Webinars
  • Designing embedded HMIs and connecting them to hardware
  • 2009 Embedded Market Study
    All Articles Products Courses Papers VirtuaLabs Webinars
    Top Search Items
    C


    Techpaper Spotlight

    Wind River
    Accelerating the Development of Embedded Linux Devices with JTAG On-Chip Debugging
    /
        Login | Register | Welcome, Guest

    Topics
    POLL
    How much code have you produced in your career?
    A few KLOC
        38%
    100s of KLOC
        44%
    Millions of LOC
        11%
    A trillion
        7%
     



    WEBENCH Visualizer gives DC/DC power-supply designers real-time interactive tool for dynamic assessment, tradeoffs, optimization across various parameters and criteria
    Latest enhancement to long-established tool from National Semiconductor lets users compare, balance performance, size, cost, and BOM for ICs and passive components
    Power Management DesignLine
    Santa Clara, CA—The DC/DC power supply is one of those necessary "evils" for most designers. You know you have to have one, but it is often left for the last stages of product-design cycle, yet has to balance tradeoffs in performance, efficiency, size, BOM specifics, and, of course, cost. And while the "perfect" supply for a given application may require a skilled and experienced designer, smarter tools can help the designer come up with a very good design which meets key requirements, and clarifies and supports acceptable tradeoffs.

    The latest version of the free WEBENCH® tool from National Semiconductor is a major enhancement for supply designers, providing a detailed set of specific designs which meet user-selected primary and secondary criteria and priorities; a typical set-up yields 50-70 design options. Once you enter the basic requirements (voltage, current), it not only produces viable designs, but lets you see how the solutions presented meet other critical requirements, In addition, it lets the user "dial" those criteria via a control panel and see the tradeoffs, such as what you can gain in efficiency or cost by giving up a little in footprint.


    This screen from National Semiconductor's WEBENCH Visualizer shows the design engineer available design options and tradeoffs, for a given set of user-entered primary criteria.
    (Click on image to enlarge)

    WEBENCH goes beyond calling out a schematic and (of course) the National Semiconductor ICs for the supply. In a addition to various electrical and thermal simulations, it also provides a detailed bill of materials (BOM) with specific–not generic–passives and pricing, with model number and pricing for the additional components which are needed to complete the supply decision, design review (what if you did this? could you try that? could you get a little more/less of that parameter?), and sign-off. (You can see a video demonstration of WEBENCH Visualizer or begin an analysis here.)

    Basic boundaries for the Visualizer are input voltages from 1 to 100 V, output voltages from 0.6 to 300 V, power levels up to 300 W, efficiency up to 96%, operation to 3 MHz, and footprints from 14 × 14 mm. In a meeting with Phil Gibson, VP of Technical Sales Tools, he noted that WEBENCH pulls from over 25 basic power-supply architectures, and 21,000 supply-related components from 110 manufacturers, with pricing and availability updated in near-real time via data feeds from various distributors and sources. If a capacitor is discontinued by its source, it will no longer show up on the WEBENCH-generated final BOM.—Bill Schweber

    Pricing and availability: The WEBENCH Visualizer tool is available for use immediately. It is free, no registration is required unless you go all the way through to the "build it" stage.♦

    1
     
     
    Latest Webinars
    · The Next Generation of Ethernet: How the New IEEE Standards Enable Energy Efficiency and Quality-of-Service
    · Simplified Physical Layer Receiver Test of Re-timed Architectures Such as USB 3.0, SATA, SAS, PCIe 2
    · How to solve the most common high-speed bus issues in embedded design on a budget
    · Early access to ARM Core Technology with Fast Models from ARM
    · Latest MIPI Standards: PHY and Protocol Testing Guidance
     
    Member Company Spotlight
    Pentek
     

    View the latest edition of Pentek's "Digital Receiver Handbook: Basics of Software Radio". This handbook shows how digital receivers can replace conventional analog receiver designs, offering significant benefits in performance, density and cost.


    Member Companies