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    Yet another FPGA startup
    Programmable Logic DesignLine
    You may (hopefully) recall that we spent several months earlier this year profiling the various FPGA startups in existence as part of a series. Following that exercise, and a subsequent EE Times cover story on FPGA startups, I thought I had the programmable logic startup landscape covered pretty well.

    So I was a bit surprised when my colleague, R. Colin Johnson, filed a story last week about an FPGA startup I'd never heard of, NuPGA.

    Of course, I shouldn't have been. I'm not trying to pass myself off as an old timer or anything, but I've been around long enough to realize that the chip business (and high-tech in general) are never stagnant. Just when you think you've got the landscape covered, it changes, often before you even realize it. It's one of the things that make this job interesting. (Not to mention one of the reasons that this job exists at all).

    If you missed R. Colin's article on NuPGA, I encourage you to read it. You'll learn, as I did, that the company was started by none other than Zvi Or-Bach, a former EE Times Innovator of the Year, father of the structured ASIC and founder of both eASIC and Chip Express.

    But the really interesting thing here is the technology, which is quite novel. It's based on a patent-pending carbon-based memory process developed by Rice University professor James Tour, which uses graphite as the reprogrammable memory element inside vias on otherwise conventional FPGAs.

    Sound interesting? I agree. And worth keeping an eye on, too. Seems that we at PLDL have more work to do. Not a bad position to be in (particularly these days).

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