To be specific, VHDL-AMS allows expression of simultaneous, nonlinear differential and algebraic equations in any model; the model creator need only express the equations and let the simulator solve them in time or frequency domain. Domain knowledge from any engineering discipline can be encapsulated in reusable libraries⁵ that are accessible by any member of the design team. It is then possible for the digital developer to start with a clear, executable specification that incorporates all of the requirements (including non-digital) and to use the same specification as a virtual verification environment. Since VHDL-AMS supports the concept of component statistical distributions⁶, it is also practical to verify that the digital design will operate in the context of tolerance and manufacturing variation, which drive the "non-digital" characteristics of mechatronic systems. A reference book for the VHDL-AMS language, The System Designer's Guide to VHDL-AMS: Analog, Mixed-Signal and Mixed-Technology Modeling, provides an extensive modeling example using the VHDL-AMS language to represent various aspects of an unpiloted aerial vehicle (UAV). The UAV example includes models focusing on mixed-signal, mixed-technology, power electronics, communications, and the overall system. See Figure 3 for an overview of the system model provided in the book. See Figure 4 for an example of a simple gain block written in the VHDL-AMS language, such as for the potentiometer that is shown in Figure 3. Note that the AMS extensions provide for declaration of ports of type "quantity" and a section in the architecture for equations that use the "==" operator. This allows creation of continuous time-domain relationships for model ports (in contrast to discrete events in "normal" VHDL). These models can be mixed freely with digital VHDL models " the VHDL-AMS language is a pure superset of VHDL " allowing for a very rich modeling environment in which to specify and verify sophisticated systems.

Figure 3. UAV System Model from The Designer's Guide to VHDL-AMS. (click on image to enlarge).

The VHDL-AMS language is an undiscovered asset for FPGA designers—a powerful tool to define and verify requirements in a non-digital context.

Figure 4. VHDL-AMS code for a simple "gain" model