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How much code have you produced in your career?
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A few KLOC
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38%
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100s of KLOC
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44%
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Millions of LOC
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11%
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A trillion
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7%
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FPGA design and verification in mechatronic applications
By Darrell A. Teegarden, Mentor Graphics Corp.
(10/13/09, 02:16:00 PM EDT)
Darrell A. Teegarden has over 20 years of experience in development of HDL-based models and software tools. He currently manages the SystemVision VHDL-AMS related tool development for the System Level Engineering division at Mentor Graphics Corporation in Wilsonville, Oregon. Darrell is an IEEE member and holds a B.S., Chemical Engineering from Oregon State University and an M.S., Electrical Engineering from Stanford University. He is a co-author of The System Designer's Guide to VHDL-AMS: Analog, Mixed-Signal, and Mixed-Technology Modeling.
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