The objective of designing a good BNC footprint is to avoid excessive impedance mismatches between the footprint and the trace connected to the footprint. It is useful to walk through the signal path and look for the possible impedance mismatches caused by board structure changes. A time domain reflectometer is an instrument capable to identify where the impedance mismatches occur. An electromagnetic simulator can be used to inspect impedance changes during board layout design. If the impedance is too low, design a board structure to shave off excess capacitance. If the impedance is too high, add a bit of extra parasitic capacitance to bring the impedance closer to the target3. With the right amount of inductance and capacitance, it is possible to create a through-hole BNC footprint with the desired characteristic impedance. Figure 7 illustrates an example of a carefully designed through-hole BNC footprint and Figure 8 illustrates the impedance of this footprint being quite close to the 75Ω target.

Figure 7. Top View of a Good Through-Hole BNC (click on image to enlarge).

Fig. 8. Impedance Profile of a Good Through-Hold BNC Footprint.