Today's FPGAs tend to operate at lower voltages and higher currents than their predecessors. Consequently, power supply requirements may be more demanding, requiring special attention to features deemed less important in past generations. Failure to consider the output voltage, sequencing, power on, and soft-start requirements, can result in unreliable power up or potential damage to the FPGA.

Output Voltage Requirements

The first criteria to consider when designing a power supplies for FPGAs are the voltage requirements for the different supply rails. Most FPGAs have specifications for the CORE and IO voltage rails, and many require additional auxiliary rails that may power internal clocks, phase lock loops or transceivers. Table 1 provides the voltage levels and tolerances for several popular FPGAs.

Table 1. Voltage Requirements for Common Modern FPGAs (click on image to enlarge).

Since FPGAs generally specify several permissible voltage levels for the IO, the voltage selected is dictated by the external digital circuitry. To provide flexibility, the FPGA will generally provide multiple IO banks that can be powered separately allowing the FPGA to interface with various logic families. For simplicity, the solutions illustrated in this article will assume all IO banks are powered off of a single power supply rail.

The core voltage supplies the internal logic configuration blocks of the FPGA and is where many of the internal digital path processes occur. As such, the current demanded by the core will vary greatly depending on the percent utilization of the FPGA. Most FPGA vendors provide design tools that estimate core current requirements based on the internal blocks utilized.

Over time the voltages used to power the core have been steadily dropping. Modern cores like the Stratix III can operate off of voltages as low as 0.9V. Lower core voltages are enabled by finer geometry silicon processes, and are valuable in keeping the power dissipated in the FPGA to a reasonable level. With process technologies designed to operate at lower voltage levels, keeping within the core voltage tolerance requirements has become more challenging for the power supply designer.