Xelerated's HX336 NPU reduces power consumption by 50%, rapid transition to 100GE

by Toni McConnel , TechOnline India - March 24, 2011

The HX336 from Xelerated is a wirespeed single-chip network processor (NPU) with advanced traffic management and deep packet buffering for 100GE/OTU4 systems, the latest addition to Xelerated's HX family of network processors

The HX336 from Xelerated is a wirespeed single-chip network processor (NPU) with advanced traffic management and deep packet buffering for 100GE/OTU4 systems, the latest addition to Xelerated's HX family of network processors. The HX336 reduces power consumption by approximately 50 percent compared to competing multi-chip packet processing and traffic management solutions. Xelerated’s line-card-on-a-chip approach enables a more rapid industry transition to 100GE, addressing key cost and power constraints in Packet-optical Transport and Carrier Ethernet Switch/Router designs.

The HX336 incorporates packet processing, switching and traffic management for a single port of 100 Gbit/s. Designed for ultra-low power consumption, it features Xelerated’s dataflow architecture with 448 highly optimized Packet Instruction Set Computer processor cores where both packet data and instructions are locally available. This eliminates costly load/store operations. The integrated traffic manager solely utilizes cost-effective DRAM as external packet buffer memory, further improving power-effectiveness.

The integrated 100 Gbit/s traffic manager provides shaping per service, user, type of user and operator. These features are critical to enforcing service provider’s service level agreements and to managing traffic over congested resources, including links or cloud compute nodes.

The HX336 traffic manager subsystem features 100Gbit/s and 150 Mbps buffering, shaping and scheduling; guaranteed wirespeed performance for all packet sizes; flexibly configurable hierarchical scheduler where all bandwidth can be assigned to a single 100GE/OTU4 port; flexibly configurable backpressure from ports or fabric devices, and architecture which linearly scales with industry DRAM evolution.

       

                                   

 

”System vendors are facing significant power budget restrictions when moving from 10GE to 40GE and 100GE solutions," said Bob Wheeler, senior analyst at The Linley Group. “Continued innovation in optics, packet processing and buffering will be required to make 100GE commercially successful. Xelerated’s unique design is an example of an NPU that is addressing the very root of the problem.”

The HX336 will sample in August 2011.

 

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