VinChip offers India-developed 32-bit RISC processor

TechOnline India - June 22, 2009

VinChip Systems Inc. (San Jose, Calif.) has announced the availability of the VinRZ5110 32-bit RISC processor core, which it claims is the first 32-but processor to be developed in India. It has a DSP-centric instruction set and low gate count for low power consumption, the company said.

LONDON — VinChip Systems Inc. (San Jose, Calif.) has announced the availability of the VinRZ5110 32-bit RISC processor core, which it claims is the first 32-but processor to be developed in India. It has a DSP-centric instruction set and low gate count for low power consumption, the company said.

VinChip, which has a design center in Chennai, India, said the VinRZ5110 is suitable for use in applications including mass storage, automotive control, wireless devices and audio/video encoders and decoders. It is also suitable for FPGA-based embedded systems.

The core has been developed with on-chip debug logic based on OpenOCD, which also supports in-system programming via JTAG. An optional module, the VinSMDP, provides static and dynamic capture of debug data and in-system programming over USB 2.0 achieving speeds of 480-Mbits per second. The VinSMDP can also multi-task as a USB port for user tasks on the AHB bus.

The VinRZ5110 core has been ported to binutils 2.19, gcc 4.3.2, gdb 6.8 and Eclipse IDE. Support for virtual prototyping has been provided by the Open Virtual platform (OVP) and OVPsim simulator from Imperas Ltd. (Thame, England). The instruction set simulator (ISS) built using OVPsim enables development of embedded software ahead of the hardware production cycle.

"VinChip's latest offering, the VinRZ5110 RISC processor, addresses customer requirements not only with the processor architecture but also with the comprehensive set of tools available. These tools include providing the instruction set simulator using Open Virtual Platforms modeling technology, so that virtual platforms based on the VinRZ5110 can be built using both OVP and SystemC/TLM-2.0 simulators," said Simon Davidmann, CEO of Imperas, in a statement issued by VinChip.

Related links and articles:

www.vinchip.com

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