Failure not an option: Heading off chip flaws during design

TechOnline India - August 27, 2009

Engineers could detect design flaws resulting in cracks, fractures and interface faults before chip fabrication using a new method that harnesses an electronics failure simulation technique called peridynamic equations.

PORTLAND, Ore. — Engineers could detect design flaws resulting in cracks, fractures and interface faults before chip fabrication using a new method that harnesses an electronics failure simulation technique called peridynamic equations.

Instead of the traditional differential equations and finite element methods used to model semiconductors, investigators from Semiconductor Research Corp. (SRC) and University of Arizona propose that manufacturers adopt peridynamic equations in order to spot faults involving discontinuities during the chip design stage.

"Cracks, fractures and even interfaces [between two different materials] are intrinsic discontinuities which differential equations have a lot of trouble with," said Scott List, SRC's director of interconnect and packaging sciences. "The peridynamic equations, circumvent all these limitations by summing over the interactions between mass nodes using integral equations instead of the intrinsic discontinuities of differential equations."

Peridynamic failure predictions: Top is the peridynamic theory simulation predicting that a crack will develop along an interface. Bottom is the experimental verification that the theory was correct.

University of Arizona professor Erdogan Madenci created a software suite that uses peridynamic theory to predict faults in chips. SRC is proposing that the industry adopt the technique. The researchers say the method will not only predict cracks that could develop during manufacturing, but also identify weakness that might develop in products.

"As chips go to finer design rules, fractures from shock become more likely," said List. "For instance, these peridynamic equations can predict where fractures might occur when a cellphone is dropped."

Peridynamics has been under development for about a decade, having been applied to predicting cracks and fractures in everything from rubber sheets to poured concrete. SRC claims the research is the first to develop a complete modeling solution for fabricating chips. Instead of partial derivatives, which do not exist for singularities like cracks, peridynamics sums up the effects of the surrounding regions. Madeci's peridynamic equations integrate the effects from up to 100,000 surrounding points to model cracks, fractures and interfaces.

The results were recently proven experimentally when cracks were detected in working chips at precisely the location predicted by Madeci's peridynamic simulations. Once detected, design engineers could use traditional methods to reengineer the suspect region, then re-run the peridynamic equations to verify that repairs fixed the problem.

Besides semiconductors, the researchers predict that the software might be applied to predicting faults in aircraft, spacecraft and even bridges and buildings.

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