AMI models: What, why and how?

by Sanjeev Gupta, Jos¿ Luis Pino, Amolak Badesha, EEs of EDA Agilent Technology , TechOnline India - October 20, 2010

With increased data rates, reduced voltage levels and low BER requirements, the semiconductor industry has now created a new standard for serial link analysis to overcome the limitations of transistor-level models. The standard, IBIS AMI (Algorithmic Modeling Interface), defines an interface between AMI models and EDA tools. Its popularity stems from the fact it allows vendors to include their own proprietary algorithms without any dependence on a specific EDA platform.

Introduction

Serializer/Deserializer (SERDES) models are traditionally available as transistor-level models that use proprietary encryption algorithms and are simulation platform dependent. While these models provide maximum accuracy to simulate the linear and nonlinear parts of a digital system, due to limitations in simulation speed and the inability to be ported over different electronic design automation (EDA) platforms, they prevent users from accurately predicting low bit-error-rate (BER). With increased data rates, reduced voltage levels and low BER requirements, the semiconductor industry has now created a new standard for serial link analysis to overcome the limitations of transistor-level models. The standard, IBIS AMI (Algorithmic Modeling Interface), defines an interface between AMI models and EDA tools. Its popularity stems from the fact it allows vendors to include their own proprietary algorithms without any dependence on a specific EDA platform. IBM originally pioneered AMI model generation and, today, remains one of its main driving forces.

As the name suggests, IBIS AMI models are a hybrid of analog and DSP models. The I/O front end of the IC is assumed to be a linear, time-invariant analog representation controlled by the regular IBIS model to account for impedance mismatch between the driver/receiver and interconnect models. The ICs back-end signal processing functionality that performs pre- and post-conditioning of signal is achieved using an algorithmic/behavioral representation of the device. The main advantages of using this technique are that time-domain simulation of nonlinear time-invariant TX/RX models can be performed much faster and, when a linear, time-invariant representation is used for SERDES devices, statistical simulation techniques can be utilized to predict low BER. Though many EDA vendors have long provided analog and DSP co-design platforms, due to the non-existence of a standard, portable SERDES models have not been available from semiconductor IC vendors.

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