Silicon circuit board seeks to replace ASICs

TechOnline India - August 24, 2009

You may be able to kiss that printed-circuit board good-bye soon, instead mounting bare die on a wafer-scale silicon circuit board that essentially eliminates the power-hungry soldered interconnections between packages.

PORTLAND, Ore. — You may be able to kiss that printed-circuit board good-bye soon, instead mounting bare die on a wafer-scale silicon circuit board that essentially eliminates the power-hungry soldered interconnections between packages.

Startup siXis Inc. (Research Triangle Park, N.C.) recently selected foundry SVTC Technologies (San Jose, Calif.) to fabricate its embedded silicon board computing modules. It claims the boards will bridge the gap between pc-board prototypes and ASIC-based designs.

The silicon circuit board also is billed by siXis as a low-cost, low-power replacement for ASICs. The company is advising customers to program their logic into an FPGA, select memory chips and peripherals, then let siXis install bare die versions of the chips on a custom silicon board, essentially creating what it claims is a system-in-package.

By mounting all system chips as bare die on a silicon circuit board, the maximum integration for multichip modules can be achieved
Click on image to enlarge.

"Our business is designing and manufacturing embedded computing modules that use our silicon circuit board technology--a large area passive silicon device that has a front side consisting of multiple layers of oxides and copper wiring and a backside consisting of silicon vias, a redistribution layer and solder bumps," said David Blaker, vice president of engineering at siXis. "We flip-chip attach logic, memory and passive components to the front side of the silicon circuit board and encapsulate it in a package so that all the customer sees is something that looks just like an industry-standard [ball grid array] package, but is in fact a complete computing system."

The company claims its technology reduces board size by a factor of three while lowering weight and power consumption compared to traditional systems using standard chips mounted on circuit boards. Designers can supply siXis with a prototype board design and the company converts it into a silicon board version manufactured by SVTC Technologies.

"You can call it a poor-man's ASIC since it's basically an alternative way of doing system-in-package, but using a higher-performance silicon substrate for interconnection and redistribution," said Jim Walker, vice president of research in semiconductor manufacturing at Gartner Inc. "Using flip chips on a silicon substrate for system-in-package will be more expensive that using lead frames and wire bonding, but for high-performance computing applications this will be very good approach since flip chips offer the fastest, lowest-power solution with the shortest possible interconnect lines."

The traditional route to downsizing a board design using standard components is to convert it into a ASIC design that reapportions logic- and peripheral-chip functions into a custom ASIC that is soldered to a pc-board alongside its memory chips. By converting it to a silicon board design instead of a ASIC, an estimated 10-fold savings is projected using the same chips as in the pc-board-based prototype.

The design also can be turned around in less than six months, Blaker added.

By keeping chip interconnects within the same BPA package, siXis claims its silicon board designs have less than 20 percent of the parasitic capacitance. Memory devices also can be integrated alongside FPGAs, creating faster interconnections that help reduce power consumption by eliminating an unnecessary layer of packaging and by shrinking the length and loads of interconnection wiring by incorporating them into the silicon board.

Other advanced packaging techniques using silicon through vias have turned to stacking dies, which eliminates the power-hungry interconnections between packages, but adds the problem of adjacent chips in the 3-D stack heating each other up. The siXis solution seeks to reaps the benefits of smaller size and shorter interconnections while keeping the chip mounted side-by-side so that only a heat sink is needed for cooling.

Besides military applications aiming for the absolute smallest, low-power designs, siXis is also targeting customers in communications, medical imaging, test and measurement, aerospace and high-performance computing. SVTC is supplying siXis with CMOS and MEMS tools for casting its silicon boards on either 200- or 300-mm wafers.

The technology was created at RTI International before being spun out as siXis.


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