Imec India identifies three projects to work on

by K C Krishnadas, TechOnline India - September 08, 2011

Imec India - the joint initiative between Wipro and Imec of Blegium - has identified three projects to work on

Applied Research in Intelligent Systems Learning (Arise) Labs, the joint initiative between Imec, based in Belgium and Wipro announced in May, has identified three projects to work on.

These product/technology programs are a healthcare necklace, hyper spectral imaging and computing products such as tablet computers, said Anurag Srivastava, chief technology officer and senior vice president, Wipro Limited.

The plan is to embark on pilot projects in the next 6-8 months in one or more of these initiatives and in the next  12 months Imec India (under which Arise Labs functions) hopes to have proof of concepts  in India and emerging nations, he said.

A necessary feature of these and other programs that Arise Labs will undertake will be on the affordability of technology in emerging nations, said Luc Van Den Hove, president and CEO, Imec. Arise Labs has already evinced an encouraging degree of interest in Indian companies but the plan is to grow steadily, rather than ramp up project and staff numbers at the earliest.

“Working on nanotechnology and the areas we have identified, the question we ask when taking on a program is whether it will have a social impact, affordability, and if work can be scaled up.  The work being done in India is not being done by Imec in its similar initiatives in China or Taiwan, Hove added.
Program with Cadence in India

As part of its plans to establish links with Indian universities and research institutions, Imec will from its new Indian office, work with Indian universities and companies to validate ideas, build prototypes, and support low-volume production.  This is being done through a pact announced today between Cadence India and Imec to offer shuttle program to universities in India.

Under this, Indian universities with hitherto unavailable access  to advanced technologies, enabling their students to work with process and design techniques through to silicon tape-out. Cadence will provide flows and methodologies, and Imec will provide access to IC technologies down to 65nm, SPICE models, design rules, PDKs, and standard cell libraries.

The shuttle program will allow members to tape-out all technologies offered through Europractice. This will give universities foundry access for silicon verification which has been a hurdle due to lack of strong academia-foundry partnerships. The Cadence-Imec collaboration bridges the gap, allowing students to span SoC and silicon realization.

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