The company added the two new PSoC 3 and PSoC 5 families to its existing PSoC 1 products. While the existing PSoC 1 family featured only very limited computing power, the new products are equipped with either a 33 MIPS 8051 8-bit processor (in the case of PSoC 3) or an 32-bit ARM Cortex-M3 CPU subsystem which would boost the number crunching capacity up to 100 DMIPS, the vendor claims. A range of optional user-definable peripherals enables designers to create a hardware platform for a broad range of 8-, 16-, and 32-bit applications.
According to the needs of the target clientele, the devices can be equipped with CAN and LIN bus for automotive applications on the protocol handling level (no PHY included, however). The usual suspects in the field of connectivity, ranging from I2C to USB and SPI, also are on board. In addition, the devices are designed for low power consumption which includes a hibernating mode with current draw as low as 200 nanoamperes, a fact intended to attract designers of portable devices, in particular for consumer electronics and portable medical applications.
The target applications include touchscreen controls for in-cabin automotive applications as well as industrial controls. According to Norm Taffe, executive vice president Consumer and Computation for Cypress, currently many OEMs and tier ones are working on concrete designs in this field.
With the added PSoC product families, the company hopes to address a market of about $12 to $15 billion ten times bigger than the market for its existing PSoC platforms.
The product roll-out will be accompanied by the availability of a development environment, the PSoC Creator, which supports sharing and reusing IP as well as concurrent HW/SW design. While however the development platform is available now, the hardware is obtainable in sample quantities only. Production ramp-up is scheduled for Q1/2010. The devices are manufactured in 130nm technology at Cypress' foundry partner Grace semiconductor.
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