Arasan announces new hardware validation platform

by K C Krishnadas, TechOnline India - December 15, 2011

The platform helps enable early validation of a new interface by emulating the complementary device at the interface protocol level

Arasan has announced its third generation hardware validation platform (HVP) family for mobile interface standards aimed at validating hardware and software infrastructure that comply with analog PHY-based standards for serial connectivity between chips, camera and display modules, and flash storage in mobile platforms.

Customers adopting emerging and existing protocols like MIPI’s Unipro, CSI-2 and DSI, JEDEC’s UFS and SDA’s SD4.0 can use the platforms to jump start and speed up pre-silicon, silicon and system validation and applications development.

The HVP helps enable early validation of a new interface by emulating the complementary device at the interface protocol level and facilitates early application development for reference board designs and production testing, before complementary devices are available in silicon.

Further, it acts as a reference platform to help root-cause any incompatibilities between the device under development and the silicon device it is communicating with. Often, a developer of cutting edge silicon products with new standard interface protocols has no means of validating one’s design with complementary devices which themselves may be under development. When such complementary devices do become available, a full speed reference platform that faithfully adheres to the protocol and provides the accompanying software stacks is necessary to aid the bringup of a device trying to communicate with another for the first time, followed by rapid deployment of reference boards to OEM’s and production testing of the OEM’s end products.

Earlier generations of these platforms address these challenges for interface protocols requiring digital interfaces, like MIPI’s SLIMbus and HSI, and SDA’s SD3.0. Arasan delivers all these platforms with the hardware and software binaries, with runtime tracing and debug capabilities. The platform family extends these capabilities to complex protocols that require analog PHY layer interfaces like MIPI’s D-PHY and M-PHY, and SDA’s UHS-II. UFS and the upcoming MIPI LLI and CSI-3 are based on the MIPI Unipro link protocols, which are complex and multi-layered in both hardware and software.

“With the advent of increasingly complex, high speed serial connectivity protocols and the related time to market challenges, IP vendors need to move beyond silicon tapeout to end system product enablement. Arasan’s platforms augment its leading edge IP and software stack offering to do precisely that, and now with the third generation we have extended this capability to deliver Total IP Solutions for high speed serial protocols for mobile applications,” says Andrew Haines, vice president, marketing, Arasan Chip Systems.


The HVPs for SD4.0, CSI-2/DSI, Unipro and UFS will be available in Q1 of 2012.


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